9
9151AINDCO07/09
ATA8742
Using C
4
= 9.2 pF ?%, C
5
= 6.8 pF ?%, a switch port with C
Switch
= 3 pF ?0%, stray capaci-
tances on each side of the crystal of C
Stray1
= C
Stray2
= 1 pF ?0%, a parallel capacitance of the
crystal of C
0
= 3.2 pF ?0% and a crystal with C
M
= 13 fF ?0%, results in a typical FSK devia-
tion of ?1 kHz typical with worst case tolerances of ?6.3 kHz to ?8.8 kHz.
3.4
CLK Output
An output CLK signal is provided for the integrated AVR. The delivered signal is CMOS compat-
ible if the load capacitance is lower than 10 pF.
3.4.1
Clock Pulse Take-over
The clock of the crystal oscillator can be used for clocking the microcontroller. Atmel
?/DIV>
s AVR
microcontroller starts with an integrated RC-oscillator to switch on the RF TX with ENABLE = H,
and after 1 ms assumes the clock signal of the transmission IC, so that the message can be sent
with crystal accuracy.
3.4.2
Output Matching and Power Setting
The output power is set by the load impedance of the antenna. The maximum output power is
achieved with a load impedance of Z
Load,opt
= (166 + j223)? There must be a low resistive path
to V
S
 to deliver the DC current.
The delivered current pulse of the power amplifier is 9 mA and the maximum output power is
delivered to a resistive load of 465?if the 1.0 pF output capacitance of the power amplifier is
compensated by the load impedance.
An optimum load impedance of:
Z
Load
= 465﹟| j/(2 ??1.0 pF) = (166 + j223)?is achieved for the maximum output power of
7.5 dBm.
The load impedance is defined as the impedance seen from the RF TXs ANT1, ANT2 into the
matching network. This large signal load impedance should not be confused with the small sig-
nal input impedance delivered as input characteristic of RF amplifiers and measured from the
application into the IC instead of from the IC into the application for a power amplifier.
Less output power is achieved by lowering the real parallel part of 465?where the parallel imag-
inary part should be kept constant.
Output power measurement can be done using the circuit shown in Figure 8-4 on page 16. Note
that the component values must be changed to compensate the individual board parasitics until
the RF TX has the right load impedance Z
Load,opt
= (166 + j223)? In addition, the damping of the
cable used to measure the output power must be calibrated out.
4.   Microcontroller Block
More detailed information about the microcontroller block can be found in the appendix.
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